1. Field of the Invention
The present invention generally relates to a semiconductor device, and particularly relates to a semiconductor device including a shield member.
2. Description of the Related Art
Semiconductor devices including shield cases for protecting electronic components mounted on boards from electromagnetic waves have been known in the art. FIG. 1 is a cross-sectional view illustrating a related-art semiconductor device 10 including a shield case 40, wherein H1 represents the height of a potting resin section 35 (hereinafter referred to as “height H1”), H2 represents the height of the semiconductor device 10 (hereinafter referred to as “height H2”), and A represents a clearance between the potting resin section 35 and the shield case 40 (hereinafter referred to as “clearance A”).
With reference to FIG. 1, the semiconductor device 10 generally comprises a board 11, electronic components 26, a semiconductor chip 31, the potting resin section 35, connection terminals 38, ground terminals 39, and the shield case 40. The board 11 generally comprises a substrate 12, through vias 13, connection portions 14 and 15, seal rings 16, solder resists 17 and 24, wiring portions 21, and ground terminal pads 23. The through via 13 extend through the substrate 12 to allow electrical connections between the connection portions 14, 15 and the wiring portions 21 and between the seal rings 16 and ground terminal pads 23.
The connection portions 14 and 15 are formed on an upper face 12A of the substrate 12 and are electrically connected to the corresponding through vias 13. The connection portions 14 are electrically connected to the semiconductor chip 31 through metal wires 34. The connection portions 15 are electrically connected to the electronic components 26. The seal rings 16 are disposed outside an area of the substrate 12 where the electronic components 26 and the semiconductor chip 31 are mounted. The seal rings 16 are electrically connected to the shield case 40. The solder resist 17 is formed on the upper face 12A of the substrate 12 so as to provide insulation between the connection portions 14 and 15.
The wiring portions 21 include connection pads 22 on which the connection terminals 38 are disposed. The wiring portions 21 are formed on a lower face 12B of the substrate 12 and electrically connected to the corresponding through vias 13. The ground terminal pads 23, on which the ground terminals 39 are disposed, are formed on the lower face 12B of the substrate 12 and electrically connected to the seal rings 16 through the corresponding through vias 13. The solder resist 24 is formed across the lower face 12B of the substrate 12, covering the wiring portions 21 but exposing the connection pads 22 of wiring portions 21 and the ground terminal pads 23.
Each electronic component 26 has one function of basic electric elements such as transistors, diodes, resistors, and capacitors. The electronic components 26 are electrically connected to the connection portions 15 through application of solder paste 27.
The semiconductor chip 31 is mounted on the upper face 12A of the substrate 12 through an adhesive 25. The semiconductor chip 31 includes electrode pads 33 that are electrically connected to the connection portions 14 through the metal wires 34. The semiconductor chip 31 is covered with the potting resin section 35, which is formed by potting resin, for protecting the metal wires 34.
The connection terminals 38 are external connection terminals to be connected to another board such as a motherboard. The connection terminals 38 are disposed on the corresponding connection pads 22. The ground terminals 39 have ground potential and are disposed on the corresponding ground terminal pads 23.
The shield case 40 covers the electronic components 26 and the semiconductor chip 31 and has an electrical connection to the seal rings 16 through application of solder paste 37 (see, for example, Patent Document 1). The electronic component 26 and the semiconductor chip 31 are protected from electromagnetic waves by having the shield case 40 in the manner described above.
[Patent Document 1] Japanese Patent Laid-Open Publication No. 2001-267628
A problem with the semiconductor device 10 is that it is not easy to locate the shield case 40 on the board 11. This is because since the semiconductor chip 31 is encapsulated by the potting resin section 35 formed by potting resin, the shield case 40 needs to be located so as to provide a clearance between the potting resin section 35 and the shield case 40 in order to prevent the shield case 40 from pressing a projecting part of the potting resin section 35. Another problem with the semiconductor device 10 is that the size thereof cannot be reduced because the shield case 40 is disposed on the board 11 with the clearance A.